1. Technical Field
The present invention relates to an electronic apparatus and a method for memory control.
2. Related Art
An electronic apparatus on which an additional DRAM (Dynamic RAM) can be installed in addition to a preinstalled DRAM is known. An electronic apparatus on which an option DRAM formed by a DIMM (Dual Inline Memory Module) can be installed in addition to an onboard standard DRAM is disclosed, e.g., in JP-A-2011-186898.
Further, the standard DRAM and the option DRAM are allocated starting from a base address in order on allocation data (memory map) of physical addresses of the plural DRAMs in an electronic apparatus such as the above.
Incidentally, if a bus width of the option DRAM is broader than that of the standard DRAM (e.g., 16 bits and 32 bits for the standard and option DRAMs, respectively) in the electronic apparatus such as the above, the memory allocated closer to the base address has a broader bandwidth.
A use of DRAM areas (including standard and option DRAM areas) by a CPU, etc., is unbalanced towards the side allocated closer to the base address in general. Then, the standard DRAM of the narrower bus with is more probably used more than the option DRAM of the broader bus width (the used area is unbalanced towards the standard DRAM) in the electronic apparatus such as the above, and the apparatus cannot achieve its full potential as a system.